ESP32-C3 SuperMini Development Board ? Wi-Fi & Bluetooth Module
Description
ESP32-C3 SuperMini Development Board ? Wi-Fi & Bluetooth Module
The ESP32-C3 is a cost-effective, highly integrated 32-bit RISC-V single-core microcontroller from Espressif Systems. It was specifically designed as a power-efficient successor to older chips like the ESP8266 for use in IoT applications.
Processor & Performance
- Architecture: 32-bit RISC-V (RV32IMC) single-core
- Clock frequency: Up to 160 MHz
- Computing power: 407.22 CoreMark (2.55 CoreMark/MHz)
Memory
- SRAM (internal): 400 KB (16 KB of which is reserved for cache)
- ROM: 384 KB (for boot and core functions)
- RTC SRAM: 8 KB (retains data in deep-sleep mode)
- Flash memory: 4 MB
- eFuse: 4 Kbit (1792 bits for developer data, such as encryption keys)
Wireless Connectivity
- Wi-Fi: 2.4 GHz, IEEE 802.11 b/g/n (Wi-Fi 4), data rates up to 150 Mbps. Supports Station, SoftAP, and Mesh modes.
Peripherals & Interfaces
(SoC level) The chip itself (in a QFN32 package) features up to 22 configurable GPIOs, of which common development boards (such as the ESP32-C3 SuperMini) typically expose 11 to 13 pins.- Analog inputs: 2× 12-bit SAR ADC (up to 6 channels)
- Digital interfaces:
- 3× SPI
- 2× UART
- 1× I2C
- 1× I2S
- LED PWM (up to 6 channels)
- Native USB: Integrated USB-Serial/JTAG controller (enables direct flashing and debugging via USB without the need for a separate USB-to-serial converter chip).
- Temperature sensor: 1× internal
Power Consumption & Operating Conditions
- Operating voltage: 3.0 V to 3.6 V (development boards typically step down an incoming 5 V supply from USB to 3.3 V internally).
- Current consumption (deep sleep): Approx. 5 µA at the chip level (on finished development boards, this is usually around 43 µA due to the presence of LEDs and voltage regulators).
- Operating temperature: -40 °C to 105 °C (industrial-grade).
Security
- Secure Boot (Secure Boot V2)
- Flash Encryption
- Cryptographic hardware accelerators (AES-128/256, SHA-1/SHA-256, RSA, ECC, RNG, and HMAC)